1. Field of the Invention
The present invention relates to integrated circuits (ICs), and, in particular, to testing ICs that can process data at two or more different data rates.
2. Description of the Related Art
FIG. 1 shows a block diagram of an integrated circuit 100 that can process data at three different processing speeds: 100 megabits per second (Mbps), 200 Mpbs, and 400 Mpbs. Ternary input data to digital logic 102 of FIG. 1, namely 1, 0, and Z (i.e., high-impedance state), are represented by differential signaling, in which the differential signal is transmitted as a small-swing differential voltage (e.g., about 200 mV) centered around a common-mode voltage, called Tpbias. For example, for the differential pair A and A*, the logic levels may be determined as follows: EQU If (VA-VA*)&gt;168 mV, then signal="1" EQU If (VA-VA*)&lt;-168 mV, then signal="0" EQU If .vertline.(VA-VA*).vertline.&lt;168 mV, then signal="Z"
where VA and VA* represent the voltage levels of differential signals A and A*, respectively. For example, if the small-swing differential is centered about a common-mode voltage Tpbias=1.9 V, then ideally: EQU Signal="1": VA=2.0V and VA*=1.8V EQU Signal="0": VA=1.8V and VA*=2.0V EQU Signal="Z": VA=1.9V and VA*=1.9V
IC 100 of FIG. 1 is designed such that the data rate for each burst of data is signaled by the common-mode voltage of a data prefix that precedes the burst of data. The data-prefix common-mode voltage is different for each different data rate. For example, the data-prefix common-mode voltage may be 1.9 V for the 100-Mbps data rate, 1.7 V for the 200-Mbps data rate, and 1.4 V for the 400-Mbps data rate. For differential signaling with a 200-mV voltage swing, the differential signals for the data prefix for the 100-Mbps data rate will have voltage levels of 1.8 V, 1.9 V, and 2.0 V. Similarly, the 200-Mbps data-prefix differential signals will have voltage levels of 1.6 V, 1.7 V, and 1.8 V, while the 400-Mbps data-prefix differential signals will have voltage levels of 1.3 V, 1.4 V, and 1.5 V. Although the common-mode voltage is changed in the data prefix to signal the data rate of the incoming burst of data, the common-mode voltage is returned to its normal level Tpbias (e.g., 1.9 V) for the differential signals in the burst of data itself.
Comparator 104 of IC 100 compares the average voltage level Vcm of the data-prefix differential signals to a reference voltage Vref.sub.-- 200 and generates a binary output signal (i.e., comparator code bit B0) that indicates whether Vcm is greater than or less than Vref.sub.-- 200. Similarly, comparator 106 of IC 100 compares the average voltage level Vcm to a reference voltage Vref.sub.-- 400 and generates a binary output signal (i.e., comparator code bit B1) that indicates whether Vcm is greater than or less than Vref.sub.-- 400.
By selecting appropriate values for Vref.sub.-- 200 and Vref.sub.-- 400, analog comparators 104 and 106 can be used to generate a 2-bit rate code for digital logic 102. A rate code is digital code whose value is used to indicate the data rate. The 2-bit rate code for digital logic 102 indicates whether the data-prefix differential signals used to generate Vem precede a burst of data having a 100-Mbps, a 200-Mbps, or a 400-Mbps data rate, so that digital logic 102 can adjust its processing speed accordingly. For example, Table I shows the 2-bit rate code values generated by comparators 104 and 106 for the different data rates, when Vref.sub.-- 200=1.8 V and Vref.sub.-- 400=1.55 V. Other rate codes are also possible, including rate codes having a number of bits other than 2.
As indicated in Table I, when the data-prefix differential signals are for the 100-Mbps data rate, the common mode voltage Vcm will be about 1.9 V, which is larger than both Vref.sub.-- 200 (=1.8V) and Vref.sub.-- 400 (=1.55V). As such, comparators 104 and 106 will both output 0s. On the other hand, when the data-prefix differential signals are for the 200-Mbps data rate, the common mode voltage Vcm will be about 1.7 V, which is larger than Vref.sub.-- 400, but smaller than Vref.sub.-- 200. In that case, comparator 104 will output 1 and comparator 106 will output 0. And when the data-prefix differential signals are for the 400-Mbps data rate, the common mode voltage Vcm will be about 1.55 V, which is smaller than both larger Vref.sub.-- 200 and Vref.sub.-- 400. In that case, both comparators 104 and 106 will output 1s.
TABLE I ______________________________________ DATA RATE Vcm B1 B0 ______________________________________ 100 Mbps .about.1.9 V 0 0 200 Mbps .about.1.7 V 0 1 400 Mbps .about.1.55 V 1 1 ______________________________________
In a manufacturing environment, automatic test equipment (ATE) tester channels may be used to emulate the behavior of a peer of IC 100 of FIG. 1. To fully fault test IC 100, the data rate and processing speed must be varied during the ATE test. In order to test all three data rates supported by computer processor 100, automatic test equipment would have to have enough tester channels to generate signals having all of the different voltages associated with those different data rates. For example, for the three specific data rates discussed earlier, the test equipment would have to support 8 different voltage levels: 1.3 V, 1.4 V, 1.5 V, 1.6 V, 1.7 V, 1.8 V, 1.9 V, and 2.0 V, with the being used for both the 100-Mbps and 200-Mbps data rates. Even with maximal efficiency, where each data rate shares two voltage levels with another data rate, the minimum number of different voltage levels that automatic test equipment must support for three different data rates is five.
Building automatic test equipment with additional tester channels can be difficult and expensive. Each additional channel creates additional problems due to fixed termination requirements. Additional channels create impedance mismatches and reflections, and require complex vectors to be generated to create the appropriate level on the bus.